symbol v ds v gs i dm i ar e ar t j , t stg symbol typ max 20 25 46 55 r jc 2.5 3.5 mj w 22 c 43 w 118 drain-source voltage v 30 28 a 50 48 a i d 120 continuous drain current b maximum units parameter t c =25c g t c =100c 25 absolute maximum ratings t a =25c unless otherwise noted v p d avalanche current c t c =100c junction and storage temperature range repetitive avalanche energy l=0.3mh c maximum junction-to-case d steady-state c/w thermal characteristics parameter units maximum junction-to-ambient a t 10s r ja c/w pulsed drain current c gate-source voltage power dissipation a t a =25c power dissipation b t c =25c continuous drain current a t a =25c maximum junction-to-ambient a steady-state c/w p dsm 2.3 t a =70c 1.4 -55 to 175 i dsm 15 a t a =70c 12 aol1436 n-channel enhancement mode field effect transistor features v ds (v) = 25v i d = 50a (v gs = 10v) r ds(on) < 6m ? (v gs = 20v) r ds(on) < 8.2m ? (v gs = 12v) r ds(on) < 11.5m ? (v gs = 10v) uis tested rg,ciss,coss,crss tested general description the aol1436 uses advanced trench technology to provide excellent r ds(on) , shoot-through immunity and body diode characteristics. this device is ideally suit e for use as a high side switch in cpu core power conversion. -rohs compliant -halogen and antimony free green device* g d s ultra so-8 tm top view bottom tab connected to drai n s g d alpha & omega semiconductor, ltd. www.aosmd.com
aol1436 symbol min typ max units bv dss 25 v 1 t j =55c 5 i gss 100 na v gs(th) 2 3.2 4 v i d(on) 120 a 56 m ? ? ? q g (12v) 20 24 nc q g (10v) 17 q gs 6.5 nc q gd 6.8 nc t d(on) 9.5 ns t r 13.5 ns t d(off) 11.5 ns t f 5.4 ns t rr 32 ns q rr 19 nc this product has been designed and qualified for the consumer market. applications or uses as critical components in life support devices or systems are not authorized. aos does not assume any liability arising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. gate drain charge v gs =0v, v ds =12.5v, f=1mhz switching parameters gate source charge gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge v gs =10v, v ds =12.5v, i d =20a total gate charge output capacitance turn-on rise time turn-off delaytime v gs =10v, v ds =12.5v, r l =0.68 ? , r gen =0.6 ? turn-off fall time turn-on delaytime dynamic parameters m ? i s =1a,v gs =0v v ds =5v, i d =20a forward transconductance diode forward voltage maximum body-diode continuous current r ds(on) static drain-source on-resistance input capacitance i dss a gate threshold voltage v ds =v gs i d =250 a v ds =20v, v gs =0v v ds =0v, v gs = 30v zero gate voltage drain current gate-body leakage current electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions body diode reverse recovery time body diode reverse recovery charge i f =20a, di/dt=100a/ s drain-source breakdown voltage on state drain current i d =250 a, v gs =0v v gs =12v, v ds =5v v gs =10v, i d =20a reverse transfer capacitance i f =20a, di/dt=100a/ s v gs =12v, i d =20a v gs =20v, i d =20a a. the value of r ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. the power dissipation p dsm is based on steady state r ja and the maximum allowed j unction temperature of 150c. the value in an y g iven application depends on the user's specific board design, and the maximum temperature of 175c may be used if the pcb allows it. b. the power dissipation p d is based on t j(max) =175c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. c: repetitive rating, pulse width limited by junction temperature t j(max) =175c. d. the r ja is the sum of the thermal impedence from junction to case r jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 us pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsi nk, assuming a maximum junction temperature of t j(max) =175c. the soa curve provides a single pulse rating. g. the maximum current rating is limited by bond-wires. h. these tests are performed with the device mounted on 1 in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. * this device is guaranteed green after date code 8p11 (june 1 st 2008) rev2: june 2008 alpha & omega semiconductor, ltd. www.aosmd.com
aol1436 t c =100c t a =25c -55 to 175 typical electrical and thermal characteristics 0 20 40 60 80 100 120 012345 v ds (volts) figure 1: on-region characteristics i d (a) v gs =8v 10v 20v 12v 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 0 5 10 15 20 25 30 i d (a) figure 3: on-resistance vs. drain current and gate voltage r ds(on) (m ? ) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 v sd (volts) figure 6: body-diode characteristics i s (a) 25c 125c 0.6 0.8 1 1.2 1.4 1.6 -50 -25 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature normalized on-resistance v gs =10v v gs =20v v gs =12v v gs =20v v gs =10v v gs =12v 2 6 10 14 18 8 101214161820 v gs (volts) figure 5: on-resistance vs. gate-source voltage r ds(on) (m ? ) v gs =10v v gs =20v i d =20a 25c 125c i d =20a 0 20 40 60 80 456789 v gs (volts) figure 2: transfer characteristics i d (a) 125c 25c v ds =5v v gs =12v alpha & omega semiconductor, ltd. www.aosmd.com
aol1436 typical electrical and thermal characteristics t c =100c t a =25c -55 to 175 0 2 4 6 8 10 12 14 16 18 20 0 5 10 15 20 25 30 35 q g (nc) figure 7: gate-charge characteristics v gs (volts) 0 200 400 600 800 1000 1200 1400 1600 0 5 10 15 20 25 30 v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss 20 40 60 80 100 120 140 0.0001 0.001 0.01 0.1 1 10 100 pulse width (s) figure 10: single pulse power rating junction-to- case (note f) power (w) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 pulse width (s) figure 11: normalized maximum transient thermal impedance (note f) z jc normalized transient thermal resistance c oss c rss v ds =12.5v i d =20a single pulse d=t on /t t j,pk =t c +p dm .z jc .r jc r jc =3.5c/w t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =175c t c =25c 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 v ds (volts) i d (amps) figure 9: maximum forward biased safe operating area (note f) 10 s 100ms dc r ds(on) limited t j(max) =175c t c =25c 100 s alpha & omega semiconductor, ltd. www.aosmd.com
aol1436 typical electrical and thermal characteristics 0 20 40 60 80 100 0.00001 0.0001 0.001 time in avalanche, t a (s) figure 12: single pulse avalanche capability i d (a), peak avalanche current 150c 25c 0 10 20 30 40 50 0 25 50 75 100 125 150 175 t case (c) figure 13: power de-rating (note b) power dissipation (w) t a =25c 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 t case (c) figure 14: current de-rating (note b) current rating i d (a) 0 20 40 60 80 100 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) power (w) 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 16: normalized maximum transient thermal impedance (note h) z ja normalized transient thermal resistance d=t on /t t j,pk =t a +p dm .z ja .r ja r ja =55c/w t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse single pulse alpha & omega semiconductor, ltd. www.aosmd.com
aol1436 vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vd c dut l vds vgs vds is d isd diode recovery tes t circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt t rr ar ar - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd char ge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms tt r d(on) t on t d( of f ) t f t off alpha & omega semiconductor, ltd. www.aosmd.com
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